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SS431/G Adjustable Precision Shunt Regulator FEATURES Low voltage operation (2.5V) Adjustable output voltage from VO = V REF to 18V Wide operating current range from 0.4mA to 100mA Low dynamic output impedance 0.5 max. ESD rating is 5.5kV (per MIL-STD 883D) Pb-free lead finish available. DESCRIPTION The SS431 is a low-voltage three-terminal adjustable shunt regulator with a guaranteed thermal stability over the applicable temperature range. The output voltage can be set to any value between VREF (approximately 2.5V) to 18V with two external resistors (see application circuit). This device has a typical output impedance of 0.2 ohms. Active output circuitry provides very sharp turn-on characteristics, making this device an excellent replacement for Zener diodes in many applications. The SS431 is characterized for operation from 0C to 105C, and three package options (SOT-23, SOT-89, and TO-92) allow the designer the opportunity to select the proper package for his application. The SS431 is available with a Pb-free lead finish - order as SS431Gxx. APPLICATIONS Linear Regulators Adjustable Supplies Switching Power Supplies Battery Operated Computers Instrumentation Computer Disk Drives PIN CONFIGURATION SOT-23 (Top view) BLOCK DIAGRAM Cathode Ref 2 Cathode Anode 3 1 + Reference Vref SOT-89 (Top view) Anode 3 2 1 Cathode Anode Reference TO-92 (Top view) 3 Cathode 2 Anode 1 Reference SYMBOL Cathode Ref. Anode Rev.2.02 3/11/2004 www.SiliconStandard.com 1 of 7 SS431/G ABSOLUTE MAXIMUM RATINGS over ambient temp. range. Parameter # $ % Symbol Maximum !" " " Units ELECTRICAL CHARACTERISTICS # & '& & '& + & & '- ! !! !" ( !" #)!" , " * #$ $ $ $ $ #$ $ $ % Rev.2.02 3/11/2004 www.SiliconStandard.com 2 of 7 SS431/G TYPICAL PERFORMANCE CHARACTERISTICS !"#!$%& & !"#!$%& & Rev.2.02 3/11/2004 www.SiliconStandard.com 3 of 7 SS431/G TEST CIRCUITS APPLICATION INFORMATION VMAX VDEV = VMAX-VMIN VMIN Where: T2-T1=full temperature change. VREF can be positive or negative depending on whether the slope is positive or negative. Example: VDEV= 7.0mV, VREF= 2495mV, T2-T1= 105C, slope is negative. VREF = T1 TEMPERATURE T2 7.0mV 106 2495mV 105 C = -27ppm/C Deviation of reference input voltage, V DEV, is defined as the maximum variation of the reference input voltage over the full temperature range. The average temperature coefficient of the reference input voltage, VREF is defined as: Note 4. The dynamic output impedance, Rz, is defined as: RZ = VZ IZ ppm VREF = C 6 VMAX - VMIN 6 VDEV 10 10 VREF(at 25C) VREF(at 25C) = T2 - T1 T2 - T1 When the device is programmed with two external resistors, R1 and R2, (see Fig. 2), the dynamic output impedance of the overall circuit, is defined as: rz = V Rz 1+ R1 R2 I [] Rev.2.02 3/11/2004 www.SiliconStandard.com 4 of 7 SS431/G APPLICATION EXAMPLES VIN R1 RCL IOUT VIN SS431 SS431 R1 RS IOUT=VREF/ RCL Current Limiter or Current Source IOUT=VREF /RS Constant-Current Sink VIN RIN R3 R1 VOUT VIN FUSE R1 R3 VOUT SS431 R2 SS431 R2 VOUT (1+R1/R2) x VREF Higher-Current Shunt Regulator VLIMIT (1+R1/R2) x VREF Crow Bar VIN R1A R1B R3 SS431 Output turns ON when Low Limit + R4 R5 VBE Low Limit VREF ( 1+ R1B/ R2B )+ VBE High Limit VREF ( 1+ R1A/ R2A ) Over-Voltage/Under-Voltage Protection Circuit Rev.2.02 3/11/2004 www.SiliconStandard.com 5 of 7 SS431/G PHYSICAL DIMENSIONS SOT-23 ! + + ! ! " $%$ && && $%'$ $%$ %'$ %($ %* %$ %* %$ && $%$ $%$$ $%$ $%($ $%$ %$$ %)$ %*$ %*$ %*$ %*$ # $%$ && && $%)$ $%*$ %$ %$$ %'* %,$ %'* %,$ && SOT-89 Rev.2.02 3/11/2004 www.SiliconStandard.com 6 of 7 SS431/G PHYSICAL DIMENSIONS TO-92 ORDERING INFORMATION SS431(G)xBxx TR: Tape and Reel Packing Bandgap tolerance B = 1% Example: SS431GNBTR Package type N = SOT-23-3 T = TO-92 G = SOT-89 Lead finish option: G for Pb-free lead finish SS431 with 1% tolerance in SOT-23-3 with pb-free lead finish shipped on tape and reel Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.02 3/11/2004 www.SiliconStandard.com 7 of 7 |
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